CIRCUITS FOR EFFICIENT DETECTION OF VECTOR SIGNALING CODES FOR CHIP-TO-CHIP COMMUNICATION

摘要

In a detection circuit, inputs correspond to received indications of vector signaling code words received by a first integrated circuit from a second integrated circuit. With four inputs, the circuit compares a first pair to obtain a first difference result and compares a second pair, disjoint from the first pair, to obtain a second difference result. The first and second difference results are then summed to form an output function. A system might use a plurality of such detection circuits to arrive at an input word. The circuit can include amplification, equalization, and input selection with efficient code word detection. The vector signaling code can be a Hadamard matrix code encoding for three input bits. The circuit might also have frequency-dependent gain, a selection function that directs one of the summation function result or the first difference result to the output function, variable gain, and/or a slicer.

主权项

1. A method comprising:
generating a first difference signal between signals received on a first pair of selected inputs representing symbols of a codeword of an orthogonal vector signal code received via a multi-wire communication bus; generating a second difference signal between signals received on a second pair of selected inputs representing symbols of the codeword of the orthogonal vector signaling code received via the multi-wire communications bus, the first pair of selected inputs and the second pair of selected inputs being disjoint; generating a sum-of-differences output signal by combining the first difference signal and the second difference signal; generating a portion of a respective code identification result signal based on the sum-of-differences output signal, the code identification result signal fully identifying a set of output bits represented by the received codeword of the orthogonal vector signaling code.