发明名称 SUBSTRATE COMPRISING STACKS OF INTERCONNECTS, INTERCONNECT ON SOLDER RESIST LAYER AND INTERCONNECT ON SIDE PORTION OF SUBSTRATE
摘要 An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one dielectric layer, a first stack of first interconnects in the at least one dielectric layer, and a second interconnect formed on at least one side portion of the at least one dielectric layer. The first stack of first interconnects is configured to provide a first electrical path for a non-ground reference signal, where the first stack of first interconnects is located along at least one side of the package substrate. The second interconnect is configured to provide a second electrical path for a ground reference signal.
申请公布号 WO2016134070(A1) 申请公布日期 2016.08.25
申请号 WO2016US18345 申请日期 2016.02.17
申请人 QUALCOMM INCORPORATED 发明人 JOW, Uei-Ming;SONG, Young Kyu;LEE, Jong-Hoon;ZHANG, Xiaonan;VELEZ, Mario Francisco
分类号 H01L23/498 主分类号 H01L23/498
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