发明名称 SEMICONDUCTOR DEVICE
摘要 According to one embodiment, a semiconductor device includes an input/output circuit. An input/output circuit includes first to third circuits. The first circuit transmits one of first to third data to the second circuit. The second circuit outputs the data, in a first-in-first-out (FIFO) format. The third circuit transmits first clock signal to the first circuit when the first circuit outputs one of the first and second data. When the one of the first and second data is read, the second circuit receives the one of the first and second data in response to the first clock signal within a period until a first signal is received. When the third data is read, the second circuit receives the third data in response to a second clock signal within the period.
申请公布号 US2016350253(A1) 申请公布日期 2016.12.01
申请号 US201514843497 申请日期 2015.09.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KOJIMA Masatsugu;ABE Mitsuhiro
分类号 G06F13/40;G06F13/42 主分类号 G06F13/40
代理机构 代理人
主权项 1. A semiconductor device comprising: an input/output circuit electrically connected to an external controller, wherein the input/output circuit includes: a first circuit configured to electrically connect one of first data bus input one of first and second data and second data bus input a third data with a third data bus, and electrically connect the one of first signal line input a first clock signal and second signal line input a second clock signal with a third signal line; a second circuit configured to output one of first to third data, which are input from the third data bus, in a first-in-first-out (FIFO) format; and a third circuit configured to generate the first clock signal and supply the first clock signal to the first circuit through the first signal line, when the one of the first and second data is read, the second circuit receives the one of the first and second data in response to the first clock signal within a period until a first signal is received after a read command and address data are received from the external controller, and when the third data is read, the second circuit receives the third data in response to the second clock signal within the period.
地址 Minato-ku JP
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