MULTI-THREADED TRANSLATION AND TRANSACTION RE-ORDERING FOR MEMORY MANAGEMENT UNITS

摘要

Systems and methods relate to performing address translations in a multithreaded memory management unit (MMU). Two or more address translation requests can be received by the multithreaded MMU and processed in parallel to retrieve address translations to addresses of a system memory. If the address translations are present in a translation cache of the multithreaded MMU, the address translations can be received from the translation cache and scheduled for access of the system memory using the translated addresses. If there is a miss in the translation cache, two or more address translation requests can be scheduled in two or more translation table walks in parallel.

主权项

1. An apparatus comprising:
a multithreaded memory management unit (MMU) configured to receive two or more address translation requests from one or more upstream devices, wherein the multithreaded MMU is further configured to process at least two of the two or more address translation requests in parallel, to obtain corresponding translated addresses of a system memory.