METHODS AND APPARATUSES FOR ERROR CORRECTION

摘要

Embodiments of the present invention disclose methods and apparatuses for correcting errors in data stored in a solid state device. The solid state device may have a plurality of bits stored in multi-level memory cells. The method may include identifying one or more errors in a plurality of memory cells. The method may further include converting the erroneous cells to erasures. The method may further include correcting the one or more erasures.

主权项

1. An apparatus comprising:
a memory device having a plurality of multi-level cells; an encoder circuit coupled to the memory device and configured to store a plurality of data bits in the plurality of multi-level cells; and a decoder circuit coupled to the memory device and configured to identify one or more erroneous cells in the plurality of multi-level cells, convert the erroneous cells to erasures, and correct the erasures.