<p>In a semiconductor integrated circuit device (10), an element forming region (12) and a metal wiring layer (13) are covered with a passivation layer (14) on a semiconductor substrate (11) which is cut in a rectangular shape. At the four corners of the device, the passivation layer (14) is provided with corner non-wiring regions (CC1) formed directly on the semiconductor substrate (11). Thus, crack generation on the passivation layer due to heat stress can be suppressed.</p>
