发明名称 QUANTUM CASCADE SEMICONDUCTOR LASER
摘要 A quantum cascade semiconductor laser includes a substrate and a semiconductor region provided on a principal surface of the substrate, the semiconductor region including a mesa waveguide, a first burying region provided on a first side surface of the mesa waveguide, and a second burying region provided on a second side surface of the mesa waveguide. Each of the first and second burying regions includes a plurality of laminate regions and a plurality of bulk semiconductor regions that are alternately arrayed. The laminate regions are separated from each other by the bulk semiconductor region. The bulk semiconductor regions are provided on side surfaces of the laminate regions so as to embed the laminate regions. Each of the laminate regions includes a semiconductor laminate structure having a plurality of semiconductor layers.
申请公布号 US2016294160(A1) 申请公布日期 2016.10.06
申请号 US201615088600 申请日期 2016.04.01
申请人 SUMITOMO ELECTRIC INDUSTRIES, LTD. 发明人 HASHIMOTO Jun-ichi
分类号 H01S5/227;H01S5/34 主分类号 H01S5/227
代理机构 代理人
主权项 1. A quantum cascade semiconductor laser comprising: a substrate including a first region, a second region, and a third region that are arranged along a first axis, the third region being provided between the first region and the second region; and a semiconductor region provided on a principal surface of the substrate, the semiconductor region including a mesa waveguide provided on the third region of the substrate, a first burying region provided on a first side surface of the mesa waveguide and the first region of the substrate, and a second burying region provided on a second side surface of the mesa waveguide and the second region of the substrate, wherein each of the first burying region and the second burying region includes a plurality of laminate regions and a plurality of bulk semiconductor regions that are alternately arrayed in a direction of the first axis, the laminate regions are separated from each other by the bulk semiconductor regions, the bulk semiconductor regions are provided on side surfaces of the laminate regions so as to embed the laminate regions, and each of the laminate regions includes a semiconductor laminate structure having a plurality of semiconductor layers.
地址 Osaka JP