MANUFACUTRIG METHOD OF ARRAY SUBSTRATES, ARRAY SUBSTRATES, AND DISPLAY PANELS

摘要

A manufacturing method of array substrates, an array substrate, and a display panel are disclosed. The manufacturing method of the array substrate includes: forming a first electrode and a gate electrode on a substrate in sequence; forming an insulation layer, a semiconductor layer and a dielectric layer on the substrates in sequence and forming a first through hole, a second through hole and a third through hole; forming a source electrode, a drain electrode, a second electrode and a third electrode on the dielectric layer, wherein the source electrode and the drain electrode connect to the semiconductor layer respectively, the second electrode connects to the first electrode and the third electrode connects with the drain electrode. In this way, the number of the masks needed during the manufacturing process is decreased. In addition, the manufacturing process is simplified and the cost is reduced.

主权项

1. A manufacturing method of array substrates, comprising:
forming a first electrode and a gate electrode on a substrate in sequence, a transparent conductive film is provided between the gate electrode and the substrate, and the transparent conductive film and the first electrode are formed within the same manufacturing step; forming an insulation layer on the substrate, and the insulation layer covers the gate electrode and the first electrode; forming a semiconductor layer on the insulation layer; forming a dielectric layer on the semiconductor layer, and forming a first through hole and a second through hole in a location corresponding to the semiconductor layer such that a portion of the semiconductor layer are exposed via the first through hole and the second through hole, forming a third through hole in the location corresponding to the gate electrode such that the gate electrode is exposed via the third through hole; forming a source electrode, a drain electrode and a second electrode on the dielectric layer, the source electrode and the drain electrode connect to the semiconductor layer respectively via the first through hole and the second through hole, and the second electrode connects to the first electrode via the third through hole to form a storage capacitor; forming a transparent third electrode on the dielectric layer, and the third electrode connects with the drain electrode to form at least one pixel electrode; wherein the gate electrode, the source electrode, the drain electrode, and the second electrode are metallic electrodes, and the first electrode and the third electrode are ITO.