Delay lock loop

摘要

A delay lock loop is provided. A delay unit includes a delay factor and delays a first clock signal to generate a second clock signal according to the delay factor. An elimination unit delays a third clock signal to generate a fourth clock signal. A phase detection unit is coupled to the delay unit and the elimination unit and generates an indication signal according to a phase difference between the second and fourth clock signals. A control unit is coupled to the phase detection unit and the delay unit. The control unit controls the delay unit according to the indication signal to adjust the delay factor. When the delay factor is equal to an initial value, an initial time difference occurs between the first and second clock signals. A time difference between the third and fourth clock signals is equal to the initial time difference.

主权项

1. A delay lock loop, comprising:
a delay unit comprising a delay factor and delaying a first clock signal to generate a second clock signal according to the delay factor; an elimination unit delaying a third clock signal to generate a fourth clock signal; a phase detection unit coupled to the delay unit and the elimination unit and generating an indication signal according to a phase difference between the second and fourth clock signals; and a control unit coupled to the phase detection unit and the delay unit, wherein the control unit controls the delay unit according to the indication signal to adjust the delay factor, wherein when the delay factor is equal to an initial value, an initial time difference occurs between the first and second clock signals, and wherein a time difference between the third and fourth clock signals is equal to the initial time difference.