发明名称 Memory device and method for fabricating the same
摘要 A memory device includes a first insulating layer, a second insulating layer, an isolation layer, a floating gate electrode, a control gate electrode, a channel layer and a tunneling oxide layer. The second insulating layer is disposed adjacent to and substantially parallel with the first insulating layer to form an interlayer space there between. The isolation layer is disposed in the interlayer space to form a non-straight angle with the first insulating layer, and divides the interlayer space into a first recess and a second recess. The floating gate electrode is disposed in the first recess. The control gate electrode is disposed in the second recess. The channel layer is disposed on an opening surface of the first recess and forms a non-straight angle with the first insulating layer. The tunneling oxide layer is disposed between the channel layer and the floating gate electrode.
申请公布号 US9484353(B1) 申请公布日期 2016.11.01
申请号 US201514803218 申请日期 2015.07.20
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 Lai Erh-Kun;Chen Wei-Chen;Lee Dai-Ying
分类号 H01L27/115;H01L21/02;H01L29/788;H01L21/28;H01L29/04;H01L29/16 主分类号 H01L27/115
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A method for fabricating a memory device, comprising: providing a multilayers stack having a plurality of insulating layers and a plurality of sacrificing layers alternatively stacked with each other; forming at least one first through opening passing through the multilayers stack to partially expose the insulating layers and the sacrificing layers; performing a pull-back etching process to remove portions of the sacrificing layers through the first through opening, whereby a plurality of first recesses are defined by the remaining sacrificing layers and the insulating layers; partially oxidizing the remaining sacrificing layers to form an insulation layer in each of the first recess; forming a plurality of floating gate electrodes to respectively fill the first recess; forming a tunneling oxide layer to cover portions of the insulating layer and the floating gate electrodes exposed from the first through opening; forming a channel layer on the tunneling oxide layer; forming at least one second through opening passing through the multilayers stacks to partially expose the insulating layers and the remaining sacrificing layers; removing the remaining sacrificing layers to expose portions of the isolation layers, whereby a plurality of second recesses are defined by the insulating layers and the isolation layers; and forming a plurality of control gates to respectively fill in the second recesses.
地址 Hsinchu TW