发明名称 |
Transistor layout for standard cell with optimized mechanical stress effect |
摘要 |
A layout for a transistor in a standard cell is disclosed. The layout for a transistor comprises an active region with at least one portion having a first edge and at least one portion having a second edge all perpendicular to a channel of the transistor; and a gate placed on top of the active region with a distance from an edge of the gate to the first edge being shorter than a distance from the edge of the gate to the second edge of the active region, wherein the active region is of a non-rectangular shape.
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申请公布号 |
US2007284618(A1) |
申请公布日期 |
2007.12.13 |
申请号 |
US20060441557 |
申请日期 |
2006.05.26 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHANG MI-CHANG;HAN LIANG-KAI;HUANG HUAN-TSUNG;LIANG WEN-JYA;TIEN LI-CHUN |
分类号 |
H01L27/10;H01L29/739 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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