| 摘要 |
Improved techniques for accelerated life testing of a sample of semiconductor chips advantageously enable more effective testing and better estimation of lifetime. Full-chip temperature maps are computed at sets of operating and testing conditions. Evaluating the temperature maps enables operations such as: temperature-aware design changes, including adding and/or configuring heating elements, cooling elements, thermal diodes, or sensors; determination of accelerated testing conditions; avoidance of harmful conditions during accelerated testing; and the better estimation of lifetime. Iteration of the computing and the evaluating refines the accelerated testing conditions. Measuring actual testing conditions and computing a full-chip temperature map using the actual testing conditions enables the estimation of lifetime to account for the actual testing conditions. A lifetime acceleration factor map based, at least in part, on the temperature maps is used to produce the estimated lifetime. Failure analysis improves accuracy of the estimated lifetime.
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