发明名称 ENCODERS, DECODERS, CODECS AND SYSTEMS AND PROCESSES FOR THEIR OPERATION AND MANUFACTURE
摘要 A block encode circuit (800) including a scanner (820) operable to scan a block having data values spaced apart in the block by run-lengths to produce a succession of pairs of values of Level and Run representing each data value and run-length, and wherein the Level values include one or more AC values succeeded by a DC value in the succession, and a Run-Level encoder (830) responsive to said scanner (820) to encode the values of Level and Run in a same AC to DC order as in the succession of pairs of values from said scanner (820) to deliver an encoded output. Other encoders, decoders, codecs and systems and processes for their operation and manufacture are disclosed.
申请公布号 US2016301423(A1) 申请公布日期 2016.10.13
申请号 US201615182807 申请日期 2016.06.15
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 Minagawa Yusuke
分类号 H03M7/46;H04N19/176;H04N19/91;H03M7/40 主分类号 H03M7/46
代理机构 代理人
主权项 1. A decode circuit comprising: a Run-Level decoder operable to deliver a succession of pairs of values, each pair including a Run value and a Level value; and an inverse scanner responsive to the succession of pairs of values to populate a block with the Level values including one or more AC values and a DC value, the Level values spaced apart in the block by runs having lengths represented by the Run values, and the inverse-scanner is operable to sequentially populate the block using the Level values and the Run values in a same AC to DC order as in the succession of pairs of values from the Run-Level decoder.
地址 Dallas TX US