发明名称 Paralleling Interface for power supply
摘要 An interface to connect in parallel two or more digitally controlled AC power supplies. The paralleling interface is based on a master-slave scheme, and includes up to 10 electrical signals. Each signal contributes to achieve transparent operation of the paralleled units, making it perform as if it was a single unit with increased power/current capability.
申请公布号 US2016342546(A1) 申请公布日期 2016.11.24
申请号 US201614999525 申请日期 2016.05.19
申请人 Pacific Power Source, Inc. 发明人 Sonnaillon Maximiliano O.
分类号 G06F13/362;G06F13/42;G06F13/40;H02J3/00 主分类号 G06F13/362
代理机构 代理人
主权项 1. An electronic mixed-signal interface to connect two or more three phase AC power supplies in parallel with one of them acting as a master and one or more acting as slaves comprising: a. three digital serial buses, one per phase, used by a master unit to send real-time data from a control loop to a plurality of slave units; b. three analog signal buses where all units add a small-signal current proportional to their output current, used by all real-time control loops as feedback, feedforward and/or monitoring; c. a digital serial communication interface, used for non-real-time data transmission such as configuration or monitoring; d. the master generating one synchronization signal that is used by a plurality of nodes to synchronize digital control sampling time and/or power stage switching; e. any node capable of generating a global fault logic signal in case of a fault in the power stage, and which causes an immediate shut down of all other power stages; and f. all units sharing a daisy chain signal which automatically detects the position of the unit in the system, enables bus termination resistors, and determines which unit is the default master.
地址 Irvine CA US