发明名称 |
PIXEL OF A MULTI-STACKED CMOS IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME |
摘要 |
Provided is a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor and a method of manufacturing the image sensor including a light-receiving unit that may include first through third photodiode layers that are sequentially stacked, an integrated circuit (IC) that is formed below the light-receiving unit, electrode layers that are formed on and below each of the first through third photodiode layers, and a contact plug that connects the electrode layer formed below each of the first through third photodiode layers with a transistor of the IC. |
申请公布号 |
US2016225827(A1) |
申请公布日期 |
2016.08.04 |
申请号 |
US201615012604 |
申请日期 |
2016.02.01 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
PARK Kyung-bae;KIM Kyu-sik;JIN Yong-wan;CHOI Woong;LEE Kwang-hee;KIM Do-hwan |
分类号 |
H01L27/30 |
主分类号 |
H01L27/30 |
代理机构 |
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代理人 |
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主权项 |
1. A method of manufacturing a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor, the method comprising:
forming a lower insulating layer on an integrated circuit (IC); forming a first contact hole in the lower insulating layer to expose a first transistor of the IC; forming a first lower electrode layer on the lower insulating layer to fill the first contact hole; sequentially stacking a first photodiode layer and a first upper electrode layer on the first lower electrode layer to be separate from the first contact hole; forming a first interlayer insulating layer to cover the first lower electrode layer, the first photodiode layer, and the first upper electrode layer; forming a second contact hole penetrating through the first interlayer insulating layer and the lower insulating layer, and exposing a second transistor of the IC; forming a second lower electrode layer on the first interlayer insulating layer to fill the second contact hole; sequentially stacking a second photodiode layer and a second upper electrode layer on the second lower electrode layer to be separate from the second contact hole; forming a second interlayer insulating layer to cover the second lower electrode layer, the second photodiode layer, and the second upper electrode layer; forming a third contact hole penetrating through the second interlayer insulating layer, the first interlayer insulating layer, and the lower insulating layer, and exposing a third transistor of the IC; forming a third lower electrode layer on the second interlayer insulating layer to fill the third contact hole; sequentially stacking a third photodiode layer and a third upper electrode layer on the third lower electrode layer to be separate from the third contact hole; and forming an upper insulating layer to cover the third lower electrode layer, the third photodiode layer, and the third upper electrode layer. |
地址 |
Suwon-si KR |