发明名称 METHODS FOR CONSTRUCTING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) AND RELATED SYSTEMS
摘要 Methods for constructing three dimensional integrated circuits and related systems are disclosed. In one aspect, a first tier is constructed by creating active elements such as transistors on a holding substrate. An interconnection metal layer is created above the active elements. Metal bonding pads are created within the interconnection metal layer. A second tier is also created, either concurrently or sequentially. The second tier is created in much the same manner as the first tier and is then placed on the first tier, such that the respective metal bonding pads align and are bonded one tier to the other. The holding substrate of the second tier is then released. A back side of the second tier is then thinned, such that the back surfaces of the active elements (for example, a back of a gate in a transistor) are exposed. Additional tiers may be added if desired essentially repeating this process.
申请公布号 US2016225741(A1) 申请公布日期 2016.08.04
申请号 US201615095483 申请日期 2016.04.11
申请人 QUALCOMM Incorporated 发明人 Du Yang;Arabi Karim
分类号 H01L25/065;H01L23/00;H01L25/00 主分类号 H01L25/065
代理机构 代理人
主权项 1. A method of forming a three dimensional (3D) integrated circuit (IC) (3DIC) comprising: forming a first tier by: providing a first holding substrate;forming a first transistor above the first holding substrate; andforming a first interconnection metal layer above the first transistor including a first metal bonding pad; forming a second tier by: providing a second holding substrate;forming a second transistor above the second holding substrate; andforming a second interconnection metal layer above the second transistor including a second metal bonding pad; bonding the first metal bonding pad to the second metal bonding pad; and releasing the second holding substrate and exposing a second back surface of a second gate of the second transistor.
地址 San Diego CA US