| 摘要 |
PROBLEM TO BE SOLVED: To bypass data from a main memory device to an arithmetic processing part before storing the data in a cache memory without wrong data being retained in the cache memory.SOLUTION: Provided is an arithmetic processing apparatus which comprises an arithmetic processing part and a first cache memory, in which the first cache memory includes: a first data memory part comprising a plurality of first block areas for storing a portion of data which is to be stored in the main memory device, in each data block being an access unit of the main memory device; and a control part which executes a bypass process for transferring data read out of the main memory device to the arithmetic processing part before the completion of a move-in process for writing the readout data to the target block area which is one of the plurality of first block areas, and which prevents, during execution of the move-in process, write data contained in another memory access request output from the arithmetic processing part from being written to the target block area.SELECTED DRAWING: Figure 1 |
