IMAGING DEVICE AND ELECTRONIC DEVICE

摘要

To provide an imaging device capable of high-speed reading. The imaging device includes a photodiode, a first transistor, a second transistor, a third transistor, and a fourth transistor. The back gate electrode of the first transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor. The back gate electrode of the second transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the second transistor. The back gate electrode of the third transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.

主权项

1. An imaging device comprising a plurality of pixels, each of the plurality of pixels comprising:
a photodiode; a first transistor; a second transistor; a third transistor; and a fourth transistor, wherein one electrode of the photodiode is electrically connected to one of a source electrode and a drain electrode of the first transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor and one of a source electrode and a drain electrode of the third transistor, wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor, wherein the first transistor, the second transistor, and the third transistor each comprise a back gate electrode, wherein the back gate electrode of the first transistor is electrically connected to a wiring that supplies a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor, wherein the back gate electrode of the second transistor is electrically connected to a wiring that supplies a potential higher than a source potential of the second transistor, and wherein the back gate electrode of the third transistor is electrically connected to a wiring that supplies a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.