Apparatus for testing package-on-package semiconductor device and method for testing the same

摘要

An apparatus for testing a package-on-package semiconductor device comprises a pick and place device for loading a first chip into or unloading the first chip from a test socket and a lifting and rotating arm for moving a chip placement module which receives a second chip to a position between the pick and place device and the test socket. The pick and place device and the chip placement module are lowered, and then a test process is performed. After the test process is completed, the pick and place device and the chip placement module are lifted, and the lifting and rotating arm moves the chip placement module to one side of the pick and place device. Accordingly, a method for testing the semiconductor device could be performed automatically so as to greatly enhance test efficiency and accuracy and to significantly reduce costs.

主权项

1. An apparatus for testing a package-on-package semiconductor device, comprising:
a pick and place device; a test socket for receiving a first chip, the test socket being located under the pick and place device; a lifting and rotating arm, located on one side of the pick and place device; a chip placement module, provided on the lifting and rotating arm, for receiving a second chip, a bottom surface of the chip placement module being provided with a plurality of contact terminals, the second chip being electrically connected to the plurality of contact terminals; and a main controller, electrically connected to the pick and place device, the test socket, the lifting and rotating arm, and the chip placement module; wherein the main controller is configured to control the pick and place device to load the first chip into or unload the same out of the test socket, control the lifting and rotating arm to move the chip placement module to a position between the pick and place device and the test socket or adjacent to the pick and place device and control the pick and place device to lower the chip placement module so that the plurality of contact terminals are brought into electrical contact with the first chip on the test socket for performing a test process.