发明名称 |
INTEGRATED CIRCUIT DEVICE COMPRISING ENVIRONMENT-HARDENED DIE AND LESS-ENVIRONMENT-HARDENED DIE |
摘要 |
An integrated circuit device has at least one environment-hardened die and at least one less-environment-hardened die. Environment-hardened circuitry on the environment-hardened die is more resistant to the degradation when exposed to a predetermined environmental condition than the less-environment-hardened circuitry on the environment-hardened die. The dice are combined using a 3D or 2.5D integrated circuit technology. This is very useful for testing circuits at adverse environmental conditions (e.g. high temperature), or for providing circuits to operate at such conditions. |
申请公布号 |
US2016161550(A1) |
申请公布日期 |
2016.06.09 |
申请号 |
US201414560755 |
申请日期 |
2014.12.04 |
申请人 |
ARM Limited |
发明人 |
YERIC Gregory Munson;CHANDRA Vikas |
分类号 |
G01R31/28;H01L25/065;H01L21/66 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
1. An integrated circuit device comprising:
at least one environment-hardened die comprising environment-hardened circuitry; and at least one less-environment-hardened die comprising less-environment-hardened circuitry, wherein the environment-hardened circuitry is more resistant to degradation when exposed to at least one predetermined environmental condition than the less-environment-hardened circuitry; wherein:(i) the integrated circuit device comprises a plurality of vertically stacked dice including the at least one environment-hardened die and the at least one less-environment-hardened die; or(ii) the at least one environment-hardened die and the at least one less-environment-hardened die are mounted on an interposer to provide communication between the at least one environment-hardened die and the at least one less-environment-hardened die. |
地址 |
Cambridge GB |