发明名称 Data processing system with debug control
摘要 A data processing system includes a processor configured to execute processor instructions and a memory. The memory has a data array and a checkbit array wherein each entry of the checkbit array includes a plurality of checkbits and corresponds to a storage location of the data array. The system includes error detection/correction logic configured to, during normal operation, detect an error in data access from a storage location of the data array using the plurality of checkbits in the entry corresponding to the storage location. The system further includes debug logic configured to, during debug mode, use a portion of the plurality of the checkbits in the entry corresponding to the storage location to generate a breakpoint/watchpoint request for the processor.
申请公布号 US9459977(B2) 申请公布日期 2016.10.04
申请号 US201414468574 申请日期 2014.08.26
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Moyer William C.
分类号 G06F11/00;G06F11/263;G06F11/10 主分类号 G06F11/00
代理机构 代理人
主权项 1. A data processing system, comprising: a processor configured to execute processor instructions; a memory coupled to the processor, the memory having a data array and a checkbit array, wherein each entry in the checkbit array includes a plurality of checkbits and corresponds to a storage location of the data array; error detection/correction logic configured to, during normal operation, detect an error in data accessed from a storage location of the data array using the plurality of checkbits in the entry corresponding to the storage location; and debug logic configured to, during debug mode, use a portion of the plurality of the checkbits in the entry corresponding to the storage location to generate a breakpoint/watchpoint request for the processor.
地址 Austin TX US