| 摘要 |
A target transaction comprises a plurality of program instructions that execute to generate speculative updates to architectural state data. Upon detecting 200 a trigger condition the trigger condition corresponding to direct execution 202 of the transaction by processing hardware software emulation 204 of the target transaction is initiated. Preferably, the emulation permits single-stepping of the transaction instructions. Any conflict with the target transaction is detected 208, e.g. access to memory used by the transaction. If the target transaction completes without conflict then the software emulation stores data representing speculative updates generated during emulation of execution of the target transaction, i.e. the speculative updates are committed 214. The claimed invention finds typical application in debugging hardware transactions, e.g. transactional memory access. Also disclosed is an arrangement in which a memory access request is issued, receipt of a non-standard response thereto is detected and subsequent, dependent updating of architectural state occurs by one of two different processing paths (fig. 7). Also disclosed is an arrangement in which, on detecting a trigger condition, execution of a transaction is stopped prior to its completion and at least some of its speculative updates to state data are committed (fig. 9). |
