发明名称 MOS FIELD-EFFECT TRANSISTOR HAVING THICK EDGE GATE INSULATING LAYER PATTERN AND METHOD FOR FABRICATING SAME
摘要 PROBLEM TO BE SOLVED: To provide a MOS field-effect transistor improved in a breakdown voltage property by preventing GIDL. SOLUTION: The MOS field-effect transistor includes a device isolating region disposed on a predetermined portion of the semiconductor substrate to define an active region, a source region and a drain region spaced apart from each other about a channel region within the active region, a gate electrode formed on the active region between the source region and the drain region, and a gate insulating layer formed between the active region and the gate electrode. The gate insulating layer includes a central gate insulating layer disposed under central portion of a gate electrode, an edge gate insulating layer disposed under an edge of the gate electrode to have a bottom surface level with a bottom of the central insulating layer, and an upper surface protruding to be higher than an upper surface of the central gate insulating layer. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006344957(A) 申请公布日期 2006.12.21
申请号 JP20060156333 申请日期 2006.06.05
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KIM MYOUNG-SOO
分类号 H01L29/78;H01L21/8234;H01L27/088 主分类号 H01L29/78
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