Method and apparatus for coordinating memory operations among diversely-located memory components

摘要

A method and apparatus for coordinating memory operations among diversely-located memory components is described. In accordance with an embodiment of the present disclosure, wave-pipelining is implemented for an address bus coupled to a plurality of memory components. The plurality of memory components are configured according to coordinates relating to the address bus propagation delay and the data bus propagation delay. A timing signal associated with address and/or control signals which duplicates the propagation delay of these signals is used to coordinate memory operations.