发明名称 OPERATION PROPOSITION GENERATION SYSTEM AND VERIFICATION SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a system for automatically generating an operation proposition from time-series signal value data without depending upon human assistance and a system for verifying an operation proposition, which can verify an operation proposition before verifying a logic circuit. SOLUTION: The operation proposition generation system is provided with: a signal value extracting means 2 for receiving time-series signal value data 1 and extracting signal value transition information about a signal value in each clock cycle of a plurality of signals; a common database generating means 4 for generating a common database about a signal value in a certain clock cycle and signal values before and after the clock cycle on the basis of initial state information 3 about respective signal values of a plurality of signals in an initial state of a circuit and the signal value transition information; a simultaneous inactive signal extracting means 5A for extracting a simultaneous inactive signal being a combination of a plurality of signals which do not become an active state at the same time on the basis of the common database; and an operation proposition outputting means 6 for generating and outputting an operation proposition on the basis of the extracted simultaneous inactive signal. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008097504(A) 申请公布日期 2008.04.24
申请号 JP20060281284 申请日期 2006.10.16
申请人 TOSHIBA CORP 发明人 UEDA SACHIKO;ISODA SHINPEI;HORIKAWA KAZUNARI
分类号 G06F17/50 主分类号 G06F17/50
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