发明名称 Warpage control of semiconductor die package
摘要 Various embodiments of mechanisms for forming a die package using a compressive dielectric layer to contact and to surround through substrate vias (TSVs) in the die package are provided. The compressive dielectric layer reduces or eliminates bowing of the die package. As a result, the risk of broken redistribution layer (RDL) due to bowing is reduced or eliminated. In addition, the compressive dielectric layer, which is formed between the conductive TSV columns and surrounding molding compound, improves the adhesion between the conductive TSV columns and the molding compound. Consequently, the reliability of the die package is improved.
申请公布号 US9508674(B2) 申请公布日期 2016.11.29
申请号 US201313826835 申请日期 2013.03.14
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Pan Kuo Lung;Hsiao Ching-Wen;Chen Chen-Shien
分类号 H01L23/00;H01L23/31;H01L21/56 主分类号 H01L23/00
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A semiconductor die package, comprising: a semiconductor die; a first molding compound encapsulating the semiconductor die and physically contacting sidewalls of the semiconductor die; and a through substrate via (TSV) formed in the semiconductor die package and extending through the first molding compound, wherein the TSV is parallel to the semiconductor die, wherein the TSV is separated from the semiconductor die by the first molding compound and a compressive dielectric layer, wherein a length of the TSV is greater than a sum of a maximum thickness of the first molding compound and a thickness of the compressive dielectric layer, and wherein the compressive dielectric layer contacts the TSV.
地址 Hsin-Chu TW