| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a reliable SIP at low costs. <P>SOLUTION: A multichip package has a substrate, having a die holding cavity formed within the range of an upper surface and a first penetrating through hole structure. In this case, a terminal pad is formed below the first through hole structure. A first die is arranged within the range of the die holding cavity. A first dielectric layer is formed on the first die and the substrate. A first redistribution conductive layer (RDL) is formed on the first dielectric layer. A second dielectric layer is formed on the first RDL. A third dielectric layer is formed below the second die. A second redistribution conductive layer (RDL) is formed below the third dielectric layer. A fourth dielectric layer is formed below the second RDL. A conductive bump connects the first RDL to the second RDL. The second die is connected to the first die via the first and second RDLs and the conductive bump. <P>COPYRIGHT: (C)2008,JPO&INPIT |
