| 发明名称 |
HIGH RESOLUTION TIME-TO-DIGITAL CONVERTOR |
| 摘要 |
A circuit includes a time delta detector configured to receive an input clock signal and a reference clock signal and generate a delta pulse signal and a reference pulse signal. A comparison circuit is configured to receive the delta pulse signal and the reference pulse signal. The comparison circuit generates an output indicative of a bit of a time difference between the input clock signal and the reference clock signal. A control circuit is configured to receive the output from the comparison circuit. The control circuit maintains a count of the time difference between the input clock signal and the reference clock signal. |
| 申请公布号 |
US2016308520(A1) |
申请公布日期 |
2016.10.20 |
| 申请号 |
US201514689096 |
申请日期 |
2015.04.17 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHO Lan-Chou;JOU Chewn-Pu;KUO Feng Wei;CHEN Huan-Neng |
| 分类号 |
H03K5/1534;H03K5/13;H03K5/24;H03K5/135 |
主分类号 |
H03K5/1534 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A circuit, comprising:
a time delta detector configured to receive an input clock signal and a reference clock signal and generate a delta pulse signal and a reference pulse signal; a comparison circuit configured to receive the delta pulse signal and the reference pulse signal, wherein the comparison circuit generates an output indicative of a bit of a time difference between the input clock signal and the reference clock signal; and a control circuit configured to receive the output from the comparison circuit, wherein the control circuit maintains a count of the time difference between the input clock signal and the reference clock signal. |
| 地址 |
Hsin-Chu TW |
