发明名称 |
High Performance Integrated Tunable Impedance Matching Network with Coupled Merged Inductors |
摘要 |
A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. |
申请公布号 |
US2016308506(A1) |
申请公布日期 |
2016.10.20 |
申请号 |
US201514690212 |
申请日期 |
2015.04.17 |
申请人 |
Peregrine Semiconductor Corporation |
发明人 |
Cheng Chih-Chieh;Ranta Tero Tapio;Whatley Richard Bryon;Sekar Vikram |
分类号 |
H03H7/38;H03H3/00 |
主分类号 |
H03H7/38 |
代理机构 |
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代理人 |
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主权项 |
1. A tunable impedance matching network including:
(a) a coupled merged inductor having an input port and at least two output ports; (b) a first tunable capacitor electrically connected in a shunt configuration from a first one of the at least two output ports of the coupled merged inductor to circuit ground; and (c) a second tunable capacitor electrically connected in a shunt configuration from a second one of the at least two output ports of the coupled merged inductor to circuit ground. |
地址 |
San Diego CA US |