发明名称 Multi-code Chien's search circuit for BCH codes with various values of m in GF(2<sup>m</sup>)
摘要 The present invention discloses a multi-code Chien's search circuit for BCH codes with various values of m in GF(2m). The circuit includes: a combined matrix unit, a number of first multiplexers, a number of registers and a number of second multiplexers. By designing the Chien's search circuit having several Chien's search matrices, with peripheral components, it is able to achieve applications for different code rates, different code lengths and even different m in GF(2m).
申请公布号 US9467173(B2) 申请公布日期 2016.10.11
申请号 US201414445782 申请日期 2014.07.29
申请人 Storart Technology Co. Ltd. 发明人 Hung Jui Hui;Yen Chih Nan
分类号 H03M13/00;H03M13/15;H03M13/27;H03M13/29;G11B20/18 主分类号 H03M13/00
代理机构 Law Offices of Michael Chen 代理人 Chen Che-Yang;Law Offices of Michael Chen
主权项 1. A multi-code Chien's search circuit for Bose-Chaudhuri-Hocquenghem (BCH) codes with various exponents (m) in Galois Field (GF) (2m), comprising: a combined matrix unit, for providing a plurality of Chien's search matrices, receiving a plurality of inputted values, multiplying the inputted values by partial or all elements in one or more Chien's search matrix to get first operation values and second operation values, outputting the first operation values, and outputting the second operation values according to different properties of the inputted values via one of a plurality of line groups; a plurality of first multiplexers, each first multiplexer connected with one line in each line group and receiving specific second operation values, for choosing the second operation values from the corresponding line group according to different properties of the inputted values, and outputting the second operation values; a plurality of registers, each register connected with a specific first multiplexer, for receiving the second operation values, and outputting the second operation values in a next clock cycle after the plurality of registers receive the second operation values from the plurality of first multiplexers; and a plurality of second multiplexers, each second multiplexer connected with a specific register, receiving a value of a specific coefficient except a constant coefficient in an error location polynomial and the second operation values from the register, for outputting the value of the specific coefficient as the inputted value to the combined matrix unit in the first iterative operation of Chien's search, and outputting the second operation values to the combined matrix unit as the inputted values in the rest iterative operations of Chien's search, wherein values of specific coefficients of the error location polynomial for the same Chien's search matrix and the second operation values obtained by processing the values of specific coefficients have the same properties of the inputted values.
地址 Hsinchu TW