发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device equipped with a test circuit of high performance while suppressing the increase of an occupied area. SOLUTION: The arranging positions of a cell constituting a test objective circuit, and a non-connected cell prepared for the constitution of the test circuit, are determined and, thereafter, the connecting relation of the non-connected cell prepared for the constitution of the test circuit is determined based on these arrangement informations to constitute the test circuit, whereby the semiconductor integrated circuit is provided as equipped with the test circuit. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007103662(A) 申请公布日期 2007.04.19
申请号 JP20050291340 申请日期 2005.10.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHIMURA TAKASHI;UDA KENICHIRO;HIRANO YOKO;FUJIMURA KATSUYA;HAMAGUCHI KAZUMI;AZUMA KENICHIRO
分类号 H01L21/82;G01R31/28;H01L21/822;H01L27/04 主分类号 H01L21/82
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