DIGITAL ANTI-JITTER CIRCUIT FOR VERTICAL SCANNING SYSTEM

摘要

A digital anti-jitter circuit, associated with a digital vertical scanning system in a television receiver, for use in preventing jitter problems by detecting potential jitter conditions as defined by the change in the level of the signal obtained by integrating composite sync occurring nearly coincidentally with an internal clock signal. The clock signal is utilized to generate a reset signal by comparing the received integrated composite sync signal to the clock signal at a time when the integrated composite sync signal crosses a given threshold level. A vertical drive signal is generated on the leading edge of the clock pulse following the crossing of the threshold level by the integrated composite sync signal. The digital anti-jitter circuit detects the condition when the integrated composite sync signal is occurring nearly coincidentally with the clock edge and reverses the phase of the clock signal.