Complimentary MOS two state flip flop cct driven by timer pulses - consists of two changeover units connected in series with third cmos stage linking out and input

摘要

Complementary MOS two state flip flop circuit composed of two units driven by timer pulses and a conventional changeover unit. The circuit is suitable for use as a frequency divider and counter with relatively high or hich frequency and low supply voltage. The two changeover units (30, 50) are connected in series. The second stage has an output with pulses which are the opposite to those of the first stage. The first and second stage together form a CMOS two position switch with an input (10) via the first stage and an output (3) via the second stage. The CMOS switch comprises P and N channels and gates forming FET modules.