发明名称 |
LOW VOLTAGE BREAKING PN JUNCTION STRUCTURE |
摘要 |
A structure and process are disclosed for making a low-voltage breakdown p-n junction in a semiconductor substrate. The process comprises the step of etching a V-shaped groove in a semiconductor substrate of a first conductivity type, with an anistropic etchant, followed by depositing a layer of epitaxial semiconductor material of a second conductivity type in the V-shaped groove. There results a p-n junction with a small radius of curvature at the apex of the V-shaped groove having a correspondingly low breakdown voltage. |
申请公布号 |
JPS52130291(A) |
申请公布日期 |
1977.11.01 |
申请号 |
JP19770039585 |
申请日期 |
1977.04.08 |
申请人 |
IBM |
发明人 |
DEBITSUDO II DEEBAA;FURANSHISUKO EICHI DERAMONEDA |
分类号 |
H01L29/78;H01L21/20;H01L21/306;H01L27/02;H01L29/06;H01L29/866 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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