发明名称 |
Cascadable analog to digital converter |
摘要 |
A circuit for converting an input analog signal into a digital representation and a remainder signal is disclosed. The digital representation is generated by a coder that counts an integral number of clock cycles during an interval in which the magnitude of the input analog signal is compared with the magnitude of a ramp signal. The remainder signal is generated by duration-to-amplitude conversion of a pulse whose duration is the fractional remainder of the final uncounted clock cycle.
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申请公布号 |
US4144525(A) |
申请公布日期 |
1979.03.13 |
申请号 |
US19770844229 |
申请日期 |
1977.10.21 |
申请人 |
BELL TELEPHONE LABORATORIES, INCORPORATED |
发明人 |
O"NEILL, JOHN F. |
分类号 |
H03M1/14;H03M1/00;(IPC1-7):H03K13/20 |
主分类号 |
H03M1/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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