| 摘要 |
A logic element having low power consumption comprises first lateral PNP transistor whose base and emitter are respectively connected to fixed bias sources, the base voltage being smaller than the emitter voltage, and the collector of said transistor being integral with the base of a transverse NPN transistor integrated into the same substrate, the assembly forming a set of four layers defining three semiconductor junctions. The NPN transistor comprises several emitters, one of which is connected to the base of another NPN transistor whose collector is connected to the output of the device and whose emitter is earthed.
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