| 摘要 |
1. Digital angular velocity discriminator comprising, in series, a binary counter (20) incremented by a clock signal (C) provided by a clock (10) and reset by an input signal (Si ) supplied by a speed sensor (100), a first programmable decoder (30) and a first bistable circuit (50) the seconde input (R) of which is connected to the input signal (Si ) through a delay circuit (80), characterized in that, in order to achieve a hysteresis cycle-type output characteristic, the output of the binary counter (20) is connected to a second decoder (40) the output of which is connected to a second bistable circuit (60), that the second input (R) of this second circuit is connected to the input signal (Si ) through an AND gate (70) the control input of which is connected to the output Q of the first bistable circuit (50) and in that the output of the second bistable circuit (60) provides the output signal (S) of this discriminator. |
