发明名称 Adaptive decision level circuit
摘要 The adaptive decision level circuit (FIG. 3) slices a digital signal with respect to a decision level disposed between the signal levels. A correction signal generated from the sliced signals (S, S) compensates for variations in the signal levels by maintaining the decision level at a constant position relative to the signal levels. The correction signal is generated by comparing (321) the integrated difference (on lead 305) between the sliced signal and its complement with the statistically expected value (312) of the difference between the sliced signal and its complement. In the preferred embodiment, the expected value is equal to one-half the signal swing of the sliced signal.
申请公布号 US4326169(A) 申请公布日期 1982.04.20
申请号 US19800127936 申请日期 1980.03.07
申请人 BELL TELEPHONE LABORATORIES, INCORPORATED 发明人 FENDERSON, GERALD L.;SKINNER, MITCHELL A.
分类号 H03K5/08;H04L25/03;H04L25/06;H04L25/49;(IPC1-7):H03K5/08;H03K5/22 主分类号 H03K5/08
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