| 摘要 |
<p>A semiconductor memory device comprises static memory cells connected at intersections of word lines and pairs of bit lines, wherein the writing is carried out by changing the potentials of the paired bit lines according to writing data of binary digits "1" and "0" and turning on one transistor of a memory cell while turning off the other transistor of the cell. According to the write data, one of the paired bit lines is maintained at a low level (L) while the other bit line is simultaneously maintained at a high level (H), and the period of maintenance of the high level is shorter than the period of maintenance of the low level. This ensures that any vibrations in potential caused by the reduction in the level of the other bit line occur before the end of the period for writing, avoiding the risk of an error in any early subsequent reading of the data.</p> |
