| 摘要 |
A vertical countdown circuit in a television receiver includes a vertical countdown counter from which a slot is decoded and compared in time with the counter reset signal. When the counter is locked by the incoming vertical synchronization pulse, the counter reset signal overlaps the slot resulting in a detection of vertical coincidence. When two such detections are made, a signal is applied to the phase detector in the horizontal phase lock loop to decrease its gain and thus the bandpass characteristic of the phase lock loop to provide high noise immunity. If, on the other hand, a predetermined number of counter reset signals are received which do not overlap the slot, then a signal is applied to the phase detector which increases the current therethrough to increase its gain and to increase the bandpass characteristic of the horizontal phase lock loop to provide better pull-in characteristics.
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