发明名称 Decoding binary coded colour video signals.
摘要 <p>Decoder circuit arrangement for decoding binary coded colour video signals to produce analogue colour video signals therefrom comprising three inputs (1,2,3) to which the binary signals are applied these inputs being connected through an analogue level conversion circuit (5) to a selector circuit (6), both of which are provided in an 8-channel analogue multiplexer demultiplexer (4), the selector circuit (6) selecting a particular one-out-of-eight outputs (7-14) for application as control signals to the control inputs of individual switches (15-22) which are also provided in the analogue multiplexer (4). The control signal so formed renders the appropriate one of the switches (15-22) conductive. The inputs of the switches are respectively connected to points (A-H) on a potential divider (24-30) energised from a supply input (31) for a voltage supply. The one of the switches which is conductive conveys the voltage at the appropriate point (A-H) to an output terminal (2) of the analogue multiplexer (4) which output terminal is connected through a buffer amplifier to an output (33). The output (33) provides an analogue signal for the input binary signal. The arrangement also comprises two similar analogue multiplexer demultiplexer circuits (4 min ,4 sec ), the inputs to these analogue switches (15-22) also being connected to the voltage reference points (A-H). If the inputs (1,2,3) to the analogue multiplexer (4) are red binary coded video signals and inputs (34,35,36 and 37,38,39) for the analogue multiplexer (4 min ,4 sec ) are respectively blue and green binary coded video signals then the output of the three multiplexers (4,4 min ,4 sec ) will track due to the use of the common reference supply arrangement.</p>
申请公布号 EP0078087(A2) 申请公布日期 1983.05.04
申请号 EP19820201336 申请日期 1982.10.26
申请人 PHILIPS ELECTRONICS UK LIMITED;KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 WONG, KWOK KEUNG
分类号 H04N11/04;G09G1/28;(IPC1-7):09G1/28;03K13/05 主分类号 H04N11/04
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