发明名称 CIRCUIT LOGIQUE DE PUISSANCE A DOUBLE FONCTION, ET/OU, ET APPLICATION A UN DISPOSITIF DE TEST
摘要 <p>The circuit comprises a series of diode bridges (F1,F2...) and one relay (R). Each bridge's AC input terminal is connected to an input terminal of the circuit. If some input terminals are not used, they are connected together. The positive output terminals of these bridges are connected to each other and to one input terminal of a relay (R). The bridges' negative output terminals are connected to each other and to the other input terminal of the relay. One OR output terminal (SOU) is connected to one relay's input terminal. One AND output terminal (SET) is the relay's output terminal. The other OR and AND outputs are at the common potential. The circuit is capable of functioning when the voltages at the inputs differ. If such is the case, the output (SOU) acquires the highest value input voltage.</p>
申请公布号 FR2519492(A1) 申请公布日期 1983.07.08
申请号 FR19810024566 申请日期 1981.12.31
申请人 LABORATOIRE GL TELECOMMUNICATION 发明人 MICHEL NOLLET ET JEAN-CLAUDE RIVALLIN;RIVALLIN JEAN-CLAUDE
分类号 H03K19/12;(IPC1-7):03K19/12;01R31/28 主分类号 H03K19/12
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