发明名称 |
Semiconductor device design and process |
摘要 |
A method for fabricating a gate-source structure for a recessed-gate static induction transistor. Source impurities are implanted prior to forming the recessed gates. The recessed gates are formed by a first isotropic etching step and a second anisotropic etching step which results in a unique overhanging protective layer used to protect the walls of the grooves during implantation of gate impurities in the bottom of the grooves. Implantations are driven and activated to form gate and source regions, the protective layer is removed and metal deposited to form electrodes. The procedure minimizes the required number of masking steps and associated mask registration problems.
|
申请公布号 |
US4403396(A) |
申请公布日期 |
1983.09.13 |
申请号 |
US19810334393 |
申请日期 |
1981.12.24 |
申请人 |
GTE LABORATORIES INCORPORATED |
发明人 |
STEIN, RICHARD J. |
分类号 |
H01L21/306;H01L21/308;H01L21/335;H01L29/10;(IPC1-7):H01L21/26;H01L21/30 |
主分类号 |
H01L21/306 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|