MEMORY ADDRESS CONTROLLER

摘要

PURPOSE:To shorten the length of an instruction word when an address is directly designated, and to improve the efficiency of instruction, by controlling an address control circuit by an address designation control signal given from a processor and a control signal given from an address control flag circuit. CONSTITUTION:A direct address designation flag circuit 1 is designated and controlled by aplying a control signal to a set terminal 2 or a reset terminal 3 from a processor. An NAND circuit 4 supplies the address designation control signal given from the processor and the output of the circuit 1 and delivers an OR of NOT and AND. An AND gate 8 delivers an upper memory address XH or YH through a register 7 by the control signal of the circuit 4. A multiplexer 11 is controlled by an address designation control signal given from the processor and delivers the direct address signal given from a terminal 12 or an address XL or YL of a register 10 in the form of a lower memory address.