发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To facilitate the leading of a source electrode to an external location and shrink the element area by a method wherein a gate electrode is built in a horizontal hole under the main surface. CONSTITUTION:Between semiconductor layers 4, 6 with one conductive type, a semiconductor layer 5 of the other conductive type is formed, for the construction of a vertical MOS-FET substrate. In this three-layer substrate, a hole is provided on the main surface to reach the lowest semiconductor layer 4, whereafter a horizontal hole is provided in parallel with the main surface. The horizontal hole serves as a gate electrode 3, the main surface as a source electrode 1, and the rear side as a drain electrode 2. With the device being constructed as such, an MOS-FET is obtained, small in element area, easy to lead the source electrode 1 to an external location.
申请公布号 JPS58196051(A) 申请公布日期 1983.11.15
申请号 JP19820079369 申请日期 1982.05.12
申请人 NIPPON DENKI KK 发明人 HANEDA HISASHI
分类号 H01L29/417;H01L29/78 主分类号 H01L29/417
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