发明名称 MIS FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To increace the drain avalanche breakdown voltage by a method wherein the impurity concentration of a doped layer for preventing leakage current provided in the neighborhood of an insulation substrate is made equal to that of a doped layer for controlling threshold voltage. CONSTITUTION:Between a drain 12 and a source 13 provided on the insulation substrate 14, and under a gate electrode 10, an N type layer 18 for restraining an interface leakage current, a non-doped layer 17, an N type layer 16 for controlling a threshold voltage and controlling a depletion layer width, a P type layer 15 for controlling the threshold voltage, and a gate oxide film 11 are formed successively from the substrate 14. Further, the avalanche breakdown at a drain junction is determined not by the impurity concentration per unit volume of the substrate in the neighborhood of the drain, but by the amount of the impurity per unit area viewed from the depth direction; therefore the difference between the amounts of the impurity per unit area of the layers 15 and 16 is made equal to the amount of the impurity per unit area of the layer 18.
申请公布号 JPS5961068(A) 申请公布日期 1984.04.07
申请号 JP19820169703 申请日期 1982.09.30
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 OONO YASUO
分类号 H01L27/12;H01L29/78;H01L29/786 主分类号 H01L27/12
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