发明名称 SYSTEM AND METHOD FOR STABILIZING ASYNCHRONOUS STATE MACHINES
摘要 <p>System for stabilizing asynchronous state machines in which the operation passes from state to state as a result of being actuated by digital input signals that are not synchronous with each other. In order to prevent an improper sequence of progression of the machine as a result of input signals occurring nearly simultaneously, the system includes decision logice means (44a-44m, 56a, 56b) which include input terminals (38b-38h) for receiving predetermined ones of the input signals, feedback means (47a-47c) for feeding back signals representing a present state of the machine, and holding signal output means (57). The system also includes latching means (39) for receiving a further one of the input signals, the holding signal output means (57) being arranged to control the latching means (39) to transmit this further input signal to the decision logic means only under predetermined state conditions. </p>
申请公布号 WO1984002988(A1) 申请公布日期 1984.08.02
申请号 US1984000106 申请日期 1984.01.24
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址