发明名称 BUFFER MEMORY CONTROL SYSTEM
摘要 PURPOSE:To decrease the amount of transfer of data to a buffer memory by storing only the information excluding space information among document information from a CPU to a memory and writing a dot pattern only to a part having characters from the CPU. CONSTITUTION:The data converted into the dot pattern read from buffer memories 101, 102 is latched 302 by a signal line in response to an address of the signal line 5 being an output of a counter 301, and the data of the space dot pattern of signal lines 8, 9 is written in the identical address of the read buffer memory by a write signal of the signal line 6. Further, contents of the memories 101, 102 are converted all into space dot patterns in the stage when all the data are read. moreover, since the CPU has only to write the dot pattern only to the part having characters in the stage when the data converted into the dot pattern is written from the CPU to the memories 101, 102, the amount of transfer of data to the memories 101, 102 is decreased.
申请公布号 JPS59193663(A) 申请公布日期 1984.11.02
申请号 JP19830066913 申请日期 1983.04.18
申请人 OKI DENKI KOGYO KK 发明人 HORI KOUSEI;INOUE MITSUYOSHI
分类号 H04N1/00;H04N1/21 主分类号 H04N1/00
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