| 摘要 |
The fullwave bridge envelope detector comprises first, second, third, and fourth rectifier circuits each of which are coupled to receive first or second alternating input signals which are 180 degrees out of phase. The first and third rectifier circuits each include a diode connected transistor and an additional transistor coupled in current mirror relationship therewith so as to produce halfwave rectified versions of the first and second alternating input signals respectively. The second and fourth rectifier circuits each comprise a transistor which is rendered conductive when first and second alternating input signals respectively become negative. The halfwave rectified signals produced by the first and second rectifier circuits and the halfwave rectified signals produced by the third and fourth rectifier circuits are summed at an output node to produce the fullwave rectified version.
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