| 摘要 |
A CML compatible EFL type latch with a data input transistor differentially coupled as a current switch to one emitter of a second multi-emitter transistor. The second emitter of the second transistor is differentially coupled as a current switch to a third transistor. The true output of the latch is connected to the collector of the second transistor, and to the base of the third transistor. Second, clamping Schottky barrier disposed between the collector and base of the third transistor. A third current switch responsive to a system clock source is connected between the two current switches to complete the latch circuitry. Utilizing this arrangement, the EFL type latch is connected directly to a combination decoder-multiplexer circuit.
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